Newspaper affiliated with China’s Communist party says the U.S. is stealing technology from “our Taiwan”
But the Global Times calls this a “dark turn” in the worldwide semiconductor industry and accuses the U.S. of tricking TSMC into building the new factories in Arizona. And using a chilling phrase, it accuses America of stealing the most important technology in the world from “our Taiwan.” The U.S. has been concerned that China, seeking to be self-sufficient in chip production itself, might attack and go to war against Taiwan seeking control of the country which would include a battle for control of TSMC.
TSMC’s first Arizona fab will turn out 4nm chips starting in 2024
TSMC has more than tripled the size of its investment in the U.S. from $12 million to $40 million and is expected to produce 600,000 wafers per year. That is a drop in the bucket when compared to the 12 million 12-inch wafers that TSMC churns out annually. TSMC continues to thrive despite some of the issues that other tech firms are experiencing. In November, company revenues soared 50.2% year-over-year to $7.27 billion.
By the time the second TSMC facility starts operations in 2026, the company could already be producing chips using a 2nm process node as it plans volume production at that node by 2025. The process node number itself doesn’t really mean anything from a technological standpoint and simply is used to market the next generation of chip production. Each lower number typically means that the transistor size has been reduced allowing for a higher transistor count for each chip.
TSMC and Samsung plan to produce 2nm chips by 2025
For example, the Apple A13 Bionic chipset, used in the iPhone 11 series back in 2019, was produced using the 7nm process node and featured 8.5 billion transistors. The A16 Bionic, used to power this year’s iPhone 14 Pro series, is manufactured using the 4nm process (actually an enhanced 5nm process node) and carries nearly 16 billion transistors. The larger the number of transistors in a chip, the more powerful and energy-efficient it is.
Gelsinger is basing his optimism on Intel’s use of RibbonFET transistor architecture, similar to Gate-All-Around (GAA) which Samsung is using on its 3nm components. TSMC will start using GAA for its 2nm chips. With GAA, nanosheets are stacked vertically allowing all sides of the channel to be covered by gates. This reduces leakages and can improve transistor density allowing more transistors to fit in a dense space.
Intel is also high on its PowerVia (or backside power delivery) technology. This allows transistors to draw electrical power from one side of a chip while the other side is used to connect to data communication links.